Reduction of defects in conductive layers during electroplating

ABSTRACT

The present invention is a method and system to reduce defects in conductive surfaces during electrochemical processes. The system includes a first power supply and a second power supply. The first powers supply is configured to supply a first power between a conductive surface of a workpiece and an electrode of the system. The second power supply is configured to supply a second power between the conductive surface and the electrode when a switching unit switches from the first power from the first power supply to the second power from the second power supply in response to the conductive surface contacting the process solution.

FIELD

The present invention relates to manufacture of semiconductor integratedcircuits and, more particularly to a method for electrochemicaldeposition of conductive layers.

BACKGROUND

Conventional semiconductor devices such as integrated circuits generallyinclude a semiconductor substrate, such as a silicon substrate, and aplurality of sequentially formed dielectric interlayers and conductivepaths or interconnects made of conductive materials. Copper andcopper-alloys have recently received considerable attention asinterconnect materials because of their superior electro-migration andlow resistivity characteristics. Interconnects are usually formed byfilling copper by a metallization process, into features or cavitiesetched into the dielectric layers. The preferred method of coppermetallization is electrodeposition or electroplating. In an integratedcircuit, multiple levels of interconnect networks laterally extend withrespect to the substrate surface. Interconnects formed in sequentiallayers can be electrically connected using vias.

In a typical process, first an insulating layer is formed on thesemiconductor substrate. Patterning and etching processes are performedto form features or cavities such as trenches and vias in the insulatinglayer. Then, a barrier/glue layer and a seed layer are deposited overthe patterned surface and a conductor such as copper is electroplated tofill all the features. FIG. 1 exemplifies a surface portion of asemiconductor substrate 10 or a wafer having features such as cavities12, 13 and 14. The cavities are formed in a dielectric layer 16, whichis deposited on the substrate 10. Before the electroplating step,cavities 12-14 and the top surface of the dielectric layer 16 are coatedwith a barrier layer 18 and a seed layer 20. During the copperelectrodeposition process, specially formulated plating solutions orelectrolytes are used to plate copper onto the seed layer. An exemplaryelectrolyte contains water, acid (such as sulfuric acid), ionic speciesof copper, chloride ions and certain additives, which affect theproperties and the plating behavior of the deposited material. FIG. 2shows a simplified schematic of a typical electrodeposition system 50for processing the wafer 10 in an electroplating solution 52 containedin a chamber 53. The wafer 10 is held by a carrier head 54 so that thefront surface 56, which is lined with the seed layer 20 (FIG. 1), isexposed to the electroplating solution 52. During the process, apotential difference is applied between the front surface 56 and ananode 58 by a power supply 60 and material deposition onto the frontsurface 56 from the solution 52 is achieved.

It is a known fact that process solutions may chemically interact withseed layers at the beginning of an electrochemical process. Thin copperseed layers, for example, are chemically attacked and may be damaged bythe process solutions when the work piece is first introduced into theprocess solution. This is especially a serious problem for wafers withnarrow and deep features. In such substrates, the seed layer thicknessmay be extremely thin especially deep in the narrow features. Forexample, for 0.15 micrometer wide, 1.0 micrometer deep, the seed layerthickness may be only 20-50 A on the lower portion of the sidewalls ofthe via, whereas the seed layer thickness at the top surface of thedielectric may be 800 A or more. Thickness of the seed layers and theirprofiles within the features of the wafers are strong functions of theseed layer deposition equipment and process.

It should be appreciated that electrodeposition solutions, especiallythose with acidic pH has certain degree of etching rate for the materialto be deposited. For example, depending upon the exact formulation,sulfuric acid based copper deposition electrolytes may have a copperetch rate of 5-200 A/min. Therefore, thin seed layers within thefeatures on a wafer may get chemically attacked within a very shortperiod once the wafer surface is wetted by the solution. This period, insome cases, maybe in the order of milliseconds, especially if the seedlayer is very thin and it contains oxides which easily dissolve in thesolutions used. Etching rate of copper oxide is much higher than etchingrate of pure copper in acidic electrolytes.

Hot entry is one way of avoiding this unwanted interaction between theprocess solution and the seed layer, when wafers with thin or weak seedlayers are immersed into the process solutions for electroplating.During hot-entry, a voltage is applied to the seed layer before it iswetted by the process solution. This cathodic voltage protects the seedlayer against chemical dissolution and material deposition startsimmediately onto the seed layer. However, hot entry has some drawbacks,such as formation of hot spots, which are high current density spots andtherefore high deposition locations on the wafer where the solutionmakes the initial physical contact with the seed layer.

FIGS. 3A-3B exemplify various stages of formation of the hot spots onthe seed layer 20 and the effects of hot spots on the plated layer. FIG.3A illustrates an instant of initial contact between the processsolution 52 and the seed layer 20 on the wafer 10 while a platingvoltage is applied to the seed layer 20 through the power supply 60. Asthe wafer 10 is lowered onto the solution, seed layer 20 first maycontact ripples 62 on surface of the process solution 52. These ripplesmay be due to various sources. Vibrations of the various systemcomponents or simply movement of the process solution during the processmay generate such ripples or small waves. It should be noted thatripples represent specific locations where the solution first makesphysical contact with the wafer surface. These locations may notnecessarily be due to waves or ripples. For example, in tool designswhere the wafer enters the solution at an angle, only one small portionof the substrate surface first touches the solution. The hot-spotproblem that we are about to describe takes place at that location inthat case.

Referring back to FIG. 3A, as the tips of the ripples touch the seedlayer, since a voltage has already been applied between the seed layerand an anode (not shown), current flows from the anode, through theprocess solution 52 and to the seed layer 20 only through the contactspots 64, depositing copper in the process, preferentially andinstantaneously onto the seed layer locations defined by the contactspots 64. Contact spots 64 represent a very small area fraction comparedto the total area of the wafer surface. Therefore, during this initialplating the current density at the contact spots 64 is high and as shownin FIG. 3B, it causes almost instantaneous formation of individualcopper growths 66 at the location of contact spots 64. These coppergrowths 66 are also called hot spots. From this point on, if the platingprocess is continued, a copper layer 68 with a non-uniform thickness isformed on the seed layer, as shown in FIG. 3C. Due to the growths 66,thickness of the layer 68 on the hot spots 64 is thicker than the restof the layer, which is an unwanted situation in manufacture ofinterconnects. It should be noted that the sketches of FIGS. 3A through3C are not drawn to scale. The depth of the features may actually besmaller than the height of the ripples. Therefore, hot spots may formnot only on the top surface of the dielectric but also within thefeatures causing defects in the features. Furthermore, the size of thehot spots may change from sub-micron to several millimeters.

To address the problem described above, some prior art methods use coldentry, i.e. entry of the substrate into the solution with no appliedvoltage and then apply the plating voltage. However, as discussedpreviously, upon cold entry, thin, oxidized or weak seed layers may getchemically attacked by the process solution within a time period of onesecond or less unless there is an applied cathodic voltage to protectthem.

To this end there is a need for plating methods that provide uniformdeposition layers without defects even on substrates with weak seedlayers.

SUMMARY OF THE INVENTION

The present invention is a method and apparatus to reduce defects inconductive layers during electrochemical material deposition orelectrochemical material removal.

The process of the present invention uses multiple power supplies andmultiple process voltages or currents to avoid formation of defects onseed layers and at the same time allow defect-free deposition of aconductor, such as copper, on wafers. In one embodiment, a first powerfrom a first power supply is provided to the seed layer prior tocontacting the seed layer to the surface of the electroplating solution.Upon contacting the solution, switching from the first power from thefirst power supply to a second power from a second power supplyautomatically takes place.

According to an aspect of the present invention, a system forelectroprocessing a conductive surface on a workpiece using a processsolution and an electrode while holding the workpiece with a workpiececarrier is disclosed. The system comprises a first power supplyconfigured to supply a first power between the conductive surface andthe electrode, a second power supply configured to supply a second powerbetween the conductive surface and the electrode, and a switching unitfor switching the first power to the second power in response to theconductive layer contacting the process solution.

According to another aspect of the present invention, method ofelectroprocessing a conductive surface on a workpiece is provided. Theelectroprocessing uses a process solution and an electrode wetted by theprocess solution. The method includes the steps of applying a firstpower between the conductive surface and the electrode using a firstpower supply, contacting the conductive surface to the process solution,and applying a second power between the surface and the electrode usinga second power supply.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic cross sectional view of a portion of asemiconductor substrate including features and surface of the substratecoated with a conductive layer;

FIG. 2 is a schematic side view of a conventional electrochemicaldeposition system;

FIGS. 3A-3C are schematic cross-sectional views showing various stagesof the formation of the hot spot defects on the conductive layer of thesubstrate shown in Figure land the effects of the defects on theelectroplated layer;

FIG. 4 is a schematic view of the system of the present inventionincluding at least two power supplies; and

FIGS. 5A-5D are schematic cross sectional views showing various stagesof a process of an embodiment of the present invention on asemiconductor substrate.

DETAILED DESCRIPTION OF THE INVENTION

The process of the present invention uses multiple power supplies andmultiple process voltages or currents to avoid formation of hot spots onthe seed layer and at the same time allow defect-free deposition of aconductor, such as copper, on wafers lined with thin seed layers, suchas seed layers that are thinner than 30 nm. In one embodiment, a firstpower such as a contact voltage or current from a first power supply isprovided to the seed layer prior to contacting the seed layer to thesurface of the electroplating solution. Upon contacting the solution,switching from the contact voltage or current from the first powersupply to a second power such as an electroplating voltage or currentfrom a second power supply is automatically performed and is applied tothe seed layer. As will be explained more fully below, the contactcurrent is significantly lower than the electroplating current. As aresult, as the physical contact is established between the certain spotsof the surface and the waves or ripples of the solution, current densityat these spots is not high enough to form high-rate deposition or hotspots. In this embodiment, action of switching from the contact currentto the electroplating current begins as soon as the seed layer touchesthe surface of the electroplating solution. Electroplating begins when afull contact between the wafer surface and the solution is established.The invention has the capability to switch from one power supply to theother within 200 milliseconds (ms) or earlier, avoiding formation of hotspots and at the same time preventing chemical dissolution of weak seedlayers.

FIG. 4 shows an exemplary system 100 to perform the process of thepresent invention. The system 100 includes process chamber 102 tocontain the process solution 104. Wafer 106 is held by a wafer carrier108 and rotated. Wafer may additionally be moved vertically andlaterally. Front surface 110 of the wafer 106 includes a seed layer,which will be described below. In this embodiment, the surface 110 andanode 111 of the system 100 are configured to be connected to two powersupplies, namely a first power supply (FPS) 112 and a second powersupply (SPS) 113. The power supplies 112, 113 may preferably beconnected to the anode and the surface through a switching unit 114,which allows sequential use of the power supplies. The switching unitmay include power switches S₁, S₂, S₃ and S₄. Switch S1 connects thenegative terminal of the first power supply 112 to the surface 110 ofthe wafer 106 when the switch S1 is in closed position. Switch S2connects the positive terminal of the first power supply 112 to theanode 111 when the switch S2 is in closed position. FIG. 4 showsswitches S1 and S2 in closed position (and switches S3 and S4 are inopen position) so that surface 110 and the anode 111 are connected toand energized by the first power supply 112.

Switch S3 connects the negative terminal of the second power supply 113to the surface 110 of the wafer 106 when the switch S3 is in closedposition. Similarly, switch S4 connects the positive terminal of thesecond power supply 113 to the anode 111 when the switch S4 is in closedposition. When switches S3 and S4 are in closed position and theswitches S1 and S2 are in open position, plating current is connected toand energizes the surface 110 of the wafer and the anode. Power switchesS₁-S₄ may be made of solid-state relays and associated circuitry. Thesystem of the present invention may include multiple power supplies andcorresponding multiple switch pairs to perform the present inventionusing multiple powers.

The first power supply 112 includes a monitoring terminal 115 to monitoractivity of the first power supply 112. When power supply providescurrent for the system, the monitoring terminal, in response, generatesa signal output. In one embodiment, the signal output of the monitoringterminal 115 is received by a detector 116, preferably an analogdetector. A control signal from the analog detector 116 to the switchingunit 114 controls the switches S1-S4.

In a sequential use of the power supplies, at a first stage of theprocess, the first power supply 112 is set to provide a first current.At this time, the switches S1 and S2 are in closed position and theswitches S3 and S4 are in open position, and there is no current passingbetween the surface of the wafer and the anode until a physical contactbetween the surface and the solution is established. As soon as thephysical contact is established between the surface and the solution,the initial small current dictated by FPS 112 flows from the solution tothe seed layer. Current flow or sensing the current flow causes anoutput signal (contact signal) from the monitoring terminal to theanalog detector 116. The analog detector sends a control signal (commandsignal) to the switches S1-S2 of the switching unit 114. Upon receipt ofthe control signal, the switches S1 and S2 are brought into openposition while the switches S3 and S4 are brought into closed positionand, thereby allowing a second current from the second power supply 113to be applied between the front surface of the wafer and the anode. Itis understood that, power supplies used in the invention may be on andready to be switched to the connecting process circuitry. Power issupplied from one or the other by using the switching unit.

In this embodiment, the first current is denoted as contact current andthe second current is denoted as electroplating current. It isunderstood that, in this embodiment, the contact current issignificantly lower than the electroplating current and therefore,prevents formation of the hot spots when the wafer surface first touchesthe solution at certain locations. The contact current may varydepending on the chemistry and the acidity of the process solution. Forexample, for a low acid chemistry from Enthone, the contact current fora 300 mm diameter wafer may be in the range of 0.1-1.0 A. Theelectroplating current on the other hand may be 5 A or higher.

FIGS. 5A-5D exemplify stages of the process of the present inventionusing an exemplary portion of the surface 110 of the wafer 106. Thesurface 110 of the wafer may include various features, such as vias 120and trenches 121 formed in a dielectric layer 122. Features and surfaceof the dielectric layer is coated with a barrier layer 124 and a copperseed layer 126. An electrical contact 128 connects the seed layer 126 tothe switches S1 and S3, which are in turn connected to the negativeterminals of the first and second power supplies.

As shown in FIG. 5B, as the wafer 106 is lowered onto surface 130 of theprocess solution 104, the seed layer is connected to the first powersupply 112 through switch S1, and the FPS is programmed to apply thecontact current. Height of ripples 132 on the surface 130 of thesolution 104 may be less than 2 mm. The ripple height may be defined asthe distance between surface level of the solution 104 and tip 134 ofthe ripples 132.

As shown in FIG. 5B, as the wafer 106 is lowered onto the solution withz motion of the carrier head 108, and at one instant, the tips 134 ofthe ripples 132 touch the seed layer at contact locations 136. Thiscauses low contact current to flow to the contact locations 136 from theprocess solution 104. As described above, this action generates a signaloutput from the monitoring terminal for analog detector 116. Asdescribed above, upon receipt of the signal, the analog detector 116controlling the series of switches, switches the connection to the firstpower supply 112 off and switches the connection to the second powersupply 113 on, thus initiating electroplating of the copper onto theseed layer at the plating current density provided by the second powersupply. For best results, the time of switching needs to be at least inthe range of the travel time of the wafer surface for the ripple height,i.e., the time spent between the initial contact of the tip of theripples with the seed layer and the time when surface is fully wetted bythe solution. The critical importance of the switching time is that thehigh plating current should not be switched on before the ripplestotally disappear from the wafer surface. In other words, contactbetween the solution and the seed layer should be full rather than localwhen the high current is switched on. In the present invention, usingtwo power supplies and the z-motion of the carrier head, allowsswitching from low current to high current conditions in a very shorttime such as less than 200 milliseconds, preferably less than 100 ms,while preventing problems on the seed layer.

As shown in FIG. 5C, as the wafer is fully submerged into the solution104, the second power supply 113 is connected between its surface and ananode. As shown in FIG. 5D, as the plating current is applied from thesecond power supply 113, a copper layer is uniformly plated on the seedlayer 126.

In one exemplary process sequence for a 200 mm diameter wafer, the firstpower supply is set to a small current value of between 0.05 to 0.2amps. Using the carrier head, the wafer is brought down onto thesolution with a speed of 20-40 mm/sec. As soon as the wafer touches theprocess solution, monitoring terminal output is received by an analogdetector having a sampling rate of 1 ms. The analog detector sends asignal to a circuit of solid state relays to switch the anode and waferconnections from the first power supply (contact current) to the secondpower supply (electroplating current). As solid state relays are veryfast, this switching action occurs very fast in a time period of 5-100ms.

Although various preferred embodiments and the best mode have beendescribed in detail above, those skilled in the art will readilyappreciate that many modifications of the exemplary embodiment arepossible without materially departing from the novel teachings andadvantages of this invention.

1 A method of electroprocessing a conductive surface on a workpieceusing a process solution and an electrode wetted by the processsolution, the method comprising the steps of: applying a first powerbetween the conductive surface and the electrode using a first powersupply; contacting the conductive surface to the process solution; andapplying a second power between the surface and the electrode using asecond power supply.
 2. The method of claim 1 further comprising thestep of sensing the contacting the conductive surface and generating acontrol signal in response to contacting the surface.
 3. The method ofclaim 1, wherein subsequent to the step of contacting, switching fromthe first power from the first power supply to the second power from thesecond power supply occurs.
 4. The method of claim 3, wherein switchingfrom the first power to the second power supply occurs within apredetermined switching period.
 5. The method of claim 4, wherein thepredetermined switching period is less than 100 milli seconds.
 6. Themethod of claim 3, wherein the switching begins at a partial contacttime, when a partial contact is established between the conductivesurface and the solution, and terminates at a full contact time when afull contact is established between the conductive surface and thesolution.
 7. The method of claim 1 further comprising the step ofimmersing the conductive surface into the process solution whilecontinuing to apply the second power from the second power supply. 8.The method of claim 1, wherein the first power from the first powersupply is a contact power and a second power from the second powersupply is a plating power.
 9. The method of claim 7, wherein themagnitude of the plating power is higher than the magnitude of thecontact power.
 10. A semiconductor device manufactured using the methodof claim
 1. 11. A system for electroprocessing a conductive surface on aworkpiece using a process solution and an electrode while holding theworkpiece with a workpiece carrier, the system comprising: a first powersupply configured to supply a first power between the conductive surfaceand the electrode; a second power supply configured to supply a secondpower between the conductive layer and the electrode; and a switchingunit configured to switch between the first power and the second powerin response to the conductive surface contacting the process solution.12. The system of claim 11 further comprising a detector coupled to theswitching unit configured to receive a contact signal and wherein thefirst power supply includes a current monitor configured to generate thecontact signal in response to the conductive layer contacting theprocess solution.
 13. The system of claim 12, wherein the detector inresponse to the contact signal generates a command signal to switch fromthe first power to the second power.
 14. The system of claim 11 whereinthe switching unit includes solid state relays to switch from the firstpower to the second power.
 15. The system of claim 12, wherein thedetector is an analog detector.